Introduction This application note describes the operation and features of the FAN To reduce power loss at light and no load, the FAN operates in burst mode and it includes a start-up switch to reduce the losses in the start-up circuit. Because of the internal start-up switch and burst mode operation, it is possible to supply an output power of 0. On no load condition, input power is under 0. The FAN offers a latch protection pin for the protection of the system e. The internal over voltage protection function shuts down the IC operation when the supply voltage reaches 19V.
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Introduction This application note describes the operation and features of the FAN To reduce power loss at light and no load, the FAN operates in burst mode and it includes a start-up switch to reduce the losses in the start-up circuit. Because of the internal start-up switch and burst mode operation, it is possible to supply an output power of 0.
On no load condition, input power is under 0. The FAN offers a latch protection pin for the protection of the system e. The internal over voltage protection function shuts down the IC operation when the supply voltage reaches 19V. In addition, a soft start function is provided, and the soft start time can be varied. Figure 1 shows a block diagram for the FAN It contains the following blocks. Start-up circuit and reference?
Soft start and latch? Current sense and feed back? Burst mode? Device Block Description 1. The internal start-up circuit charges the Vcc capacitor with a 1mA current source if the line is connected until the soft start is completed as shown in Fig. The internal start-up circuit starts charging the Vcc capacitor again if the Vcc voltage is lowered to the minimum operating voltage typically 8V. In such a case the UVLO block shuts down the output drive circuit and some other blocks to reduce the IC current, and the soft start capacitor is discharged to zero voltage.
If the Vcc voltage reaches the start threshold voltage, the IC starts switching again and the soft start capacitor is charged from zero voltage. The internal start-up circuit supplies current until the soft start is completed.
Therefore the Vcc capacitor must be large enough to supply sufficient current during the soft start time when starting up. The input line voltage is V and the soft start time is about 40ms. The Vcc voltage should be higher than the minimum operating voltage at start-up to enter a steady state. If the Vcc voltage is higher than 19V, the over voltage protection function works. There is some delay in the over voltage protection circuit.
In the data sheet, the operating supply current is measured with a 1nF capacitor connected at the OUT pin. Qg increases according to the MOSFET drain source voltage, therefore the drive current is maximum when the input line voltage is highest.
During the soft start period , the converter output voltage is very low, so few Figure 4. The reference output voltage is 5V. Because this voltage is the reference of the IC operation, a nF ceramic capacitor must be connected between the Vref pin and the GND pin to filter the switching noise as close as possible to the IC. Oscillator The oscillator frequency is programmed by selecting the values of Rt and Ct. The capacitor Ct is charged from the 5V reference through the resistor Rt to approximately 2.
Figure 5 shows the oscillator frequency characteristics according to the variation of Rt and Ct. The values of Rt and Ct can be chosen with reference to Fig. Thermal Protection Circuit Frequency kHz 10 Figure 7 shows an output over voltage protection circuit. If the output voltage exceeds the sum of the zener diode voltage and the photo coupler forward voltage drop, then the capacitor Css is charged.
In parallel with Css, a 1M? If a 1M? Vcc 1 Vout Figure 5. Oscillator Frequency Characteristics 2 4 3 1 2 3. Soft Start and Latch The 12uA current source charges the soft start capacitor Css when the Vcc voltage reaches the start threshold voltage. The soft start capacitor is reset when the Vcc voltage is lower than the minimum operating voltage. The soft start time Tss is calculated by 2.
A 2 The latch protection is provided to protect the system. The latch protection is reset when the Vcc voltage is lower than 5V. Figure 6 shows a thermal protection circuit which uses an NTC thermistor.
Then the PNP transistor turns on and charges the Css. Output Over Voltage Protection Circuit 4. To achieve the two functions with one pin, an internal LEB Leading Edge Blanking circuit for filtering current sensing noise is not included because an external RC filter is necessary to add output voltage feedback and current sensing information. Figure 8 shows the current sensing and feedback circuits. Rs is the current sensing resistor for sensing the switch current.
The current sensing information is filtered by an RC filter composed of Rf and Cf. The current Ifb flowing through the photo transistor varies according to the feedback information and add an offset voltage on the sensed current information as shown in Fig. The higher the DC offset is, the shorter the switch-on time is. By varying the Ifb, the duty cycle is con-? PN Figure 8. Current Sensing and Feedback Circuit Figure Design Example A 50W adapter is designed to illustrate the design procedure.
The system parameters are as follows. The offset voltage is sensed during the switch-off time. By this burst mode, a power consumption of less than 1W can be achieved in standby mode. The minimum DC link voltage can be calculated using 3. The drive output is capable of up to mA peak current with typical rise and fall times of 45ns, 35ns respectively with a 1.
Additional circuitry has been added to keep the drive output in a sinking mode whenever the UVLO is active.
This characteristic eliminates the need for an external gate pull-down resistor. The output drive capability can be improved by adding one PNP bipolar transistor as shown in Fig. In general, the on-resistance is high to prevent voltage spike at turn-on, only the turn-off characteristic is improved. If the minimum voltage is chosen then the capacitance can be calculated by 4. The selected value is uF. Figure 11 shows an experimental result for a 50W demo board with a uF capacitor.
Transformer Design Since , the European Commission has been regulating no load losses for AC adapters, battery chargers and external power supplies under 75W. Table 1 shows the regulation target specification. Figure The flyback converter transfers energy during the switch-off time. As the primary inductance of the flyback transformer increases, the energy transferred to the secondary side increases during one switching cycle. Therefore it is better to use a higher inductance transformer, but inductance is restricted by the size and cost of the transformer.
In this design example, a uH transformer is selected and the ferrite core is EER The transformer turns ratio is calculated when the input line voltage is lowest and the output power is maximum. The maximum duty ratio must be lower than 0. In this design example, the turns ratio must be higher than 0. Ae is the effective cross sectional area of the core and Bmax is the maximum flux density. Ae of EER is The calculated number of primary turns is Then the number of secondary turns can be calculated by The calculated number of secondary turns is The air gap length can be calculated by For the DCM, the turn-on time can be calculated as in An adequate IC supply voltage is 12V considering the minimum operating voltage and the over voltage protection level.
In this design example, the number of Vcc windings is selected so as to be the same as that of the secondary windings, namely 10 turns. If the number of windings is too small, the supply voltage can touch minimum operating voltage at no load; then the UVLO circuit comes into operation, increasing the power loss. If the number of windings is too large, the supply voltage can reach the over voltage protection level.
If it proves difficult to prevent over voltage protection operation in normal mode, the circuit as shown in Fig. The maximum average current of the output diode is the same as the maximum load current.
In this case, 4. For better efficiency, two V, 20A schottky diodes are used. Then the diode reverse voltage can exceed the diode rating. The gate drive on resistance is 75?.
As shown in the figure, the diode reverse voltage exceeds the diode rating, V. To reduce the diode reverse voltage, gate drive resistance is changed to ?. Vcc 18V Figure
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Typical Applications. The FAN is a green programmable frequency current. It is specially designed for the. The internal high voltage start-up switch and the burst mode. The FAN includes some. The latch protection can be used for over voltage. And the soft.